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High level synthesis and generating FPGAs with the BEDROC system.
Miriam Leeser
Richard Chapman
Mark D. Aagaard
Mark H. Linderman
Stephan Meier
Published in:
J. VLSI Signal Process. (1993)
Keyphrases
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high level synthesis
parallel architecture
hardware implementation
artificial intelligence
case study
search algorithm
image analysis
low cost