Energy optimization of multi-level processor cache architectures.
Uming KoPoras T. BalsaraAshwini K. NandaPublished in: ISLPD (1995)
Keyphrases
- memory hierarchy
- optimization algorithm
- memory management
- high speed
- energy consumption
- multi core processors
- optimization problems
- embedded processors
- optimization method
- global optimization
- parallel architectures
- query processing
- processor core
- cache misses
- single chip
- computer architecture
- optimization process
- prefetching
- parallel processing
- main memory
- input output
- data structure