A subpicosecond jitter PLL for clock generation in 0.12-μm digital CMOS.

Nicola Da Dalt Christoph Sandner

Published in: IEEE J. Solid State Circuits (2003)

Keyphrases

high speed
power consumption
circuit design
cmos image sensor
mixed signal
low power
vlsi circuits
low cost
real time
single chip
image sensor
analog to digital converter
duty cycle
digital technologies
digital media
multi channel
image processing