Login / Signup
A Low-Cost and High-Throughput NoC-Aware Chip-to-Chip Interconnection.
Wenkang Liao
Yuhao Guo
Shanlin Xiao
Zhiyi Yu
Published in:
ISCAS (2020)
Keyphrases
</>
network on chip
high density
high speed
low cost
single chip
response time
routing algorithm
cmos technology
analog vlsi
physical design
programmable logic
low power
power dissipation
multi processor
packet switched