A Low-Power Half-Rate Charge-Steering Hybrid for Full-Duplex Chip-to-Chip Interconnects.
Prema Kumar GovindaswamyNijwm WaryVijaya Sankara Rao PasupureddiPublished in: ISCAS (2022)
Keyphrases
- low power
- cmos technology
- power dissipation
- high speed
- low cost
- single chip
- power consumption
- mixed signal
- low power consumption
- ultra low power
- vlsi circuits
- image sensor
- nm technology
- low voltage
- signal processor
- high power
- logic circuits
- cmos image sensor
- wireless transmission
- parallel processing
- vlsi architecture
- real time
- power reduction
- digital signal processing
- high density
- multi channel
- hardware and software
- input output
- design methodology