Hierarchical 3D interconnection architecture with tightly-coupled processor-memory integration.
Kiyoto ItoMakoto SaenKenichi OsadaTomoyuki KodamaHiroyuki MizunoPublished in: 3DIC (2010)
Keyphrases
- tightly coupled
- loosely coupled
- memory management
- fine grained
- processing elements
- level parallelism
- memory hierarchy
- general purpose
- memory access
- instruction set
- memory subsystem
- multithreading
- parallel architecture
- hierarchical architecture
- associative memory
- high speed
- parallel processing
- random access memory
- web services
- industry standard
- multi core processors
- computation intensive
- intel xeon
- hardware implementation
- hardware architecture
- content management
- multi processor
- high level
- single instruction multiple data
- real time
- parallel processors
- computer architecture
- main memory
- distributed systems
- case study