FPGA Logic Synthesis Using Quantified Boolean Satisfiability.
Andrew C. LingDeshanand P. SinghStephen Dean BrownPublished in: SAT (2005)
Keyphrases
- boolean satisfiability
- logic synthesis
- probabilistic planning
- heuristic search
- sat solvers
- branch and bound algorithm
- multi valued
- randomly generated
- symmetry breaking
- hardware implementation
- integer linear programming
- sat problem
- field programmable gate array
- quantum computing
- high speed
- low cost
- inductive learning
- max sat
- combinatorial problems
- logic circuits
- phase transition
- constraint programming
- orders of magnitude
- constraint satisfaction
- genetic algorithm
- boolean formula
- search space
- search algorithm
- learning algorithm