Cost-efficient of a cluster in a mesh SRAM-based FPGA.
Saif-Ur RehmanMounir BenabdenbiLorena AnghelPublished in: IOLTS (2014)
Keyphrases
- cost efficient
- power reduction
- clustering algorithm
- low cost
- power consumption
- hardware implementation
- high speed
- governmental organizations
- field programmable gate array
- d mesh
- data clustering
- real time image processing
- mesh generation
- low power
- data transmission
- data points
- data objects
- cluster analysis
- hardware architecture
- software implementation
- image segmentation
- fpga implementation
- triangle mesh
- data sets
- real time