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Design of a High Speed FPGA-Based Classifier for Efficient Packet Classification.
Pallavi V. S.
D. Rukmani Devi
Published in:
CoRR (2014)
Keyphrases
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high speed
classification method
support vector machine
classification algorithm
decision trees
classification process
classification scheme
feature selection
feature space
training samples
probabilistic classifiers
classification models
learning vector quantization
classification rate
class labels
final classification
classification accuracy
pattern recognition
support vector
multiclass classification
training set
supervised classification
hardware design
multi class classifier
high classification accuracy
binary classifiers
design process
image classification
feature vectors
training data
text classifiers
decision boundary
embedded systems
multiple classifiers
multi class
feature extraction and classification
higher classification accuracy
feature extraction