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LVDS-type on-chip transmision line interconnect with passive equalizers in 90nm CMOS process.

Akiko MineyamaHiroyuki ItoTakahiro IshiiKenichi OkadaKazuya Masu
Published in: ASP-DAC (2008)
Keyphrases
  • high speed
  • low cost
  • power dissipation
  • data sets
  • circuit design
  • line segments
  • low power
  • high density
  • cmos technology
  • programmable logic