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Domain in 65-nm CMOS Technology.
Pascal Andreas Meinerzhagen
S. M. Yasser Sherazi
Andreas Peter Burg
Joachim Neves Rodrigues
Published in:
IEEE J. Emerg. Sel. Topics Circuits Syst. (2011)
Keyphrases
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cmos technology
low power
power consumption
low voltage
spl times
high speed
parallel processing
image sensor
silicon on insulator
power dissipation
mixed signal
pattern recognition
low cost
error propagation