Adding a vector unit to a superscalar processor.

Francisca Quintana Jesús Corbal Roger Espasa Mateo Valero

Published in: International Conference on Supercomputing (1999)

Keyphrases

instruction set
computer architecture
multithreading
high speed
highly parallel
parallel processing
embedded systems
vector space
feature vectors
real time
application specific
parallel processors
data sets
floating point
feature extraction
processing units
genetic algorithm
neural network
sparse matrix