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Evaluation Methodology for Single Electron Encoded Threshold Logic Gates.
Casper Lageweg
Sorin Cotofana
Stamatis Vassiliadis
Published in:
VLSI-SoC (Selected Papers) (2003)
Keyphrases
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evaluation methodology
evaluation framework
evaluation process
test collection
evaluation measures
evaluation methods
test set
logic circuits
support vector
query suggestion
evaluation methodologies