COGRE: A Configuration Memory Reduced Reconfigurable Logic Cell Architecture for Area Minimization.
Yasuhiro OkamotoYoshihiro IchinomiyaMotoki AmagasakiMasahiro IidaToshinori SueyoshiPublished in: FPL (2010)
Keyphrases
- hardware implementation
- associative memory
- management system
- dynamic reconfiguration
- memory management
- memory usage
- real time
- reasoning engine
- software architecture
- neural network
- heterogeneous computing
- modal logic
- main memory
- memory hierarchy
- reconfigurable architecture
- network architecture
- data flow
- memory requirements
- memory space
- processing elements
- memory access
- logic programming
- description logics
- random access memory
- low cost