An efficient VLSI architecture for extended variable block sizes motion estimation.
Weifeng HeWeiwei ChenZhigang MaoPublished in: SoCC (2010)
Keyphrases
- vlsi architecture
- motion estimation
- block size
- low complexity
- motion vectors
- variable block size
- inter frame
- block matching
- mode decision
- motion compensation
- vlsi implementation
- macroblock
- low power
- search range
- video coding
- motion field
- real time
- video compression
- video sequences
- rate distortion
- bit rate
- motion estimator
- image sequences
- motion compensated
- video coding standard
- computational complexity
- quadtree
- super resolution
- prediction error
- optical flow
- intra prediction
- reference frame
- spatial domain
- distributed video coding
- coding efficiency
- computationally efficient
- high speed
- wavelet transform
- feature space
- multiscale
- multimedia
- image processing