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3D Ultrasonic Rangefinder on a Chip.
Richard J. Przybyla
Hao-Yen Tang
André Guedes
Stefon E. Shelton
David A. Horsley
Bernhard E. Boser
Published in:
IEEE J. Solid State Circuits (2015)
Keyphrases
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high speed
low cost
analog vlsi
high density
vlsi implementation
programmable logic
single chip
vlsi design
solid models
image processing
circuit design
social networks
low power
chip design
functional verification