Toward an Efficient Deep Pipelined Template-Based Architecture for Accelerating the Entire 2-D and 3-D CNNs on FPGA.
Junzhong ShenYou HuangMei WenChunyuan ZhangPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
Keyphrases
- parallel architecture
- hardware implementation
- software implementation
- data flow
- hardware architecture
- hardware design
- fpga implementation
- fpga technology
- systolic array
- real time
- hardware architectures
- xilinx virtex
- dedicated hardware
- parallel processing
- field programmable gate array
- high speed
- cellular neural networks
- software architecture
- fpga device
- pipelined architecture
- architectural design
- reconfigurable hardware
- layered architecture
- deep learning
- distributed memory
- low cost
- management system
- information systems