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Novel Hardware Architecture for Implementing the Inner Loop of the SHA-2 Algorithms.
Ignacio Algredo-Badillo
Claudia Feregrino Uribe
René Cumplido
Miguel Morales-Sandoval
Published in:
DSD (2011)
Keyphrases
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hardware architecture
hardware architectures
efficient implementation
learning algorithm
data structure
neural network
information systems
image processing
pattern recognition
computational complexity
high dimensional