Power-Efficient VLSI Realization of a Complex FSM for H.264/AVC Bitstream Parsing.
Ke XuChiu-sing ChoyCheong-fat ChanKong-Pang PunPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2007)
Keyphrases
- bitstream
- bit rate
- coding scheme
- compression algorithm
- scalable video coding
- video quality
- error resilient
- coded video
- macroblock
- power consumption
- frame rate
- video transmission
- compressed domain
- wavelet coefficients
- scalable video
- rate distortion
- video coding
- rate allocation
- multiresolution
- compressed images
- inter layer
- image quality
- error concealment
- error resilience
- computational complexity
- rate distortion optimized
- low bit rate
- visual quality
- subband
- inter frame
- low power
- compression efficiency
- multiple description coding
- quality degradation
- low complexity
- pixel domain
- feature extraction