A novel CLB architecture to detect and correct SEU in LUTs of SRAM-based FPGAs.
E. Syam Sundar ReddyVikram ChandrasekharMilagros SashikánthV. KamakotiVijaykrishnan NarayananPublished in: FPT (2004)
Keyphrases
- embedded systems
- hardware software
- low cost
- power consumption
- detection algorithm
- management system
- data sets
- neural network
- low power
- real time
- message passing
- hardware and software
- network architecture
- data flow
- software architecture
- automatic detection
- hardware design
- parallel computers
- hardware architecture
- fpga technology