Passivity verification in delay-based macromodels of electrical interconnects.
Emad GadChangzhong ChenMichel S. NakhlaRamachandra AcharPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2005)
Keyphrases
- power dissipation
- formal verification
- model checking
- input output
- fingerprint verification
- physical characteristics
- power consumption
- verification method
- power grid
- printed circuit boards
- equivalent circuit
- low voltage
- critical path
- cmos technology
- lower cost
- data sets
- signature verification
- transmission line
- face verification
- mathematical model
- markov chain
- response time