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0.68-pJ/bit Single-Loop Full-Rate Bang-Bang CDR Without Reference and Separate FD Pulling Off an 8.2-Gb/s/μs Acquisition Speed of the PAM-4 Input in 28-nm CMOS.

Xiaoteng ZhaoYong ChenPui-In MakRui Paulo Martins
Published in: IEEE J. Solid State Circuits (2022)
Keyphrases
  • high speed
  • real time
  • low cost
  • data acquisition
  • low power
  • feedback loop
  • power consumption
  • artificial neural networks
  • input data
  • infrared