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Validation of asynchronous circuit specifications using IF/CADP.
Dominique Borrione
Menouer Boubekeur
Laurent Mounier
Marc Renaudin
Antoine Siriani
Published in:
VLSI-SOC (2003)
Keyphrases
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delay insensitive
asynchronous circuits
low power
database
model validation
data sets
high level
expert systems
high speed
real time
genetic algorithm
power consumption