Towards a Formal Semantics for UML/MARTE State Machines Based on Hierarchical Timed Automata.
Yu ZhouLuciano BaresiMatteo RossiPublished in: J. Comput. Sci. Technol. (2013)
Keyphrases
- formal semantics
- state machines
- timed automata
- state machine
- theorem prover
- sequence diagrams
- first order logic
- modeling language
- model checking
- finite state machines
- petri net
- theorem proving
- fault tolerant
- logical language
- inference rules
- operational semantics
- metamodel
- modelling language
- recurrent networks
- formal methods
- database design
- test cases
- knowledge representation
- database
- temporal logic
- regression testing
- database systems
- real time