SAT-based ATPG for reversible circuits.
Hongyan ZhangRobert WilleRolf DrechslerPublished in: IDT (2010)
Keyphrases
- answer set programming
- bounded model checking
- cellular automata
- markov chain
- sat solvers
- version space
- ai planning
- high speed
- analog vlsi
- delay insensitive
- constraint solver
- logic synthesis
- sat encodings
- analog circuits
- boolean satisfiability
- digital circuits
- circuit design
- planning domains
- planning problems
- vlsi circuits
- answer sets
- power dissipation
- cmos technology
- classical planning