Low power programmable PRPG with enhanced fault coverage gradient.
Jedrzej SoleckiJerzy TyszerGrzegorz MrugalskiNilanjan MukherjeeJanusz RajskiPublished in: ITC (2012)
Keyphrases
- low power
- low cost
- single chip
- signal processor
- power consumption
- high speed
- vlsi architecture
- high power
- digital signal processing
- wireless transmission
- vlsi circuits
- low power consumption
- logic circuits
- hardware and software
- real time
- cmos technology
- image sensor
- gate array
- digital camera
- general purpose
- delay insensitive
- power reduction