Fault Tolerance in Network on Chip Using Bypass Path Establishing Packets.
Sharma PriyaSukarn AgarwalHemangee K. KapoorPublished in: VLSI Design (2018)
Keyphrases
- fault tolerance
- network on chip
- fault tolerant
- distributed systems
- load balancing
- distributed computing
- routing algorithm
- response time
- interconnection networks
- network simulator
- mobile agents
- shortest path
- peer to peer
- multi processor
- data transfer
- single point of failure
- packet loss
- multimedia
- sensor nodes
- data access
- high performance computing
- databases