Clocking circuits for a 16Gb/s memory interface.
Ting WuXudong ShiKambiz KavianiHaechang LeeJung-Hoon ChunT. J. ChinJie ShenRich PeregoKen ChangPublished in: CICC (2008)
Keyphrases
- circuit design
- high speed
- power dissipation
- gigabit ethernet
- user interface
- memory space
- memory usage
- low power
- memory requirements
- limited memory
- main memory
- user friendly
- power consumption
- graphical interface
- tunnel diode
- analog circuits
- memory size
- quantum computing
- friendly interface
- real time
- digital circuits
- computing power
- random access
- power reduction
- natural language
- random access memory
- shift register
- database systems
- learning algorithm
- genetic algorithm