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A metamorphotic Network-on-Chip for various types of parallel applications.

Seiichi TadeHiroki MatsutaniHideharu AmanoMichihiro Koibuchi
Published in: ASAP (2015)
Keyphrases
  • network on chip
  • multi processor
  • packet switched
  • routing algorithm
  • parallel processing
  • wireless sensor networks
  • parallel implementation
  • computer architecture
  • single processor