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Sensing Margin Enhancement Techniques for Ultra-Low-Voltage SRAMs Utilizing a Bitline-Boosting Current and Equalized Bitline Leakage.

Anh-Tuan DoTruc Quynh NguyenKiat Seng YeoTony Tae-Hyoung Kim
Published in: IEEE Trans. Circuits Syst. II Express Briefs (2012)
Keyphrases
  • low voltage
  • design considerations
  • power line
  • image processing
  • sensor networks
  • leakage current
  • high speed
  • cmos technology
  • training set
  • real time
  • power consumption
  • power management