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Unified Logical Effort - A Method for Delay Evaluation and Minimization in Logic Paths With RC Interconnect.
Arkadiy Morgenshtein
Eby G. Friedman
Ran Ginosar
Avinoam Kolodny
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2010)
Keyphrases
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experimental evaluation
high accuracy
computational cost
detection method
evaluation method
image processing
significant improvement
dynamic programming
synthetic data
gold standard
genetic algorithm
objective function
support vector machine
support vector machine svm
segmentation method
probabilistic logic