Transistor sizing for minimizing power consumption of CMOS circuits under delay constraint.

Manjit Borah Robert Michael Owens Mary Jane Irwin

Published in: ISLPD (1995)

Keyphrases

power dissipation
power consumption
low power
cmos technology
energy efficiency
power reduction
power management
power saving
nm technology
battery life
energy saving
data center
battery powered
low voltage
power control
clock gating