A 96-MB 3D-Stacked SRAM Using Inductive Coupling With 0.4-V Transmitter, Termination Scheme and 12: 1 SerDes in 40-nm CMOS.
Kota ShibaTatsuo OmoriKodai UeyoshiShinya Takamaeda-YamazakiMasato MotomuraMototsugu HamadaTadahiro KurodaPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2021)