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A Jitter-Tolerance-Enhanced Digital CDR Circuit Using Background Loop Gain Controller.
Yun-Sheng Yao
Chang-Cheng Huang
Shen-Iuan Liu
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2021)
Keyphrases
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circuit design
high speed
digital circuits
control system
phase locked loop
real time
closed loop
packet loss
controller design
transient response
control algorithm
mixed signal
sigma delta
low power
pid controller
adaptive control