Power-Gating Sub-Threshold Source-Coupled Logic (PG-STSCL) circuits for ultra-low-power applications.
Hossam HassanSameh IbrahimHyungWon KimPublished in: Microelectron. J. (2018)
Keyphrases
- ultra low power
- low power
- logic circuits
- chip design
- power consumption
- delay insensitive
- logic synthesis
- high speed
- power dissipation
- digital circuits
- low cost
- asynchronous circuits
- cmos technology
- multi valued
- power reduction
- tunnel diode
- floating gate
- single chip
- threshold selection
- random access memory
- shift register
- circuit design
- classical logic
- multiple sources
- logic programming
- deontic logic