A 0.16pJ/Conversion-Step 2.5mW 1.25GS/s 4b ADC in a 90nm Digital CMOS Process.

Geert Van der Plas Stefaan Decoutere Stéphane Donnay

Published in: ISSCC (2006)

Keyphrases

post processing
power consumption
digital media
data conversion
cooperative
preprocessing step
real time
data sets
digital libraries
expert systems
sigma delta