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A 10-bit 6.8-GS/s Direct Digital Frequency Synthesizer Employing Complementary Dual-Phase Latch-Based Architecture.
Abdel Martinez Alonso
Masaya Miyahara
Akira Matsuzawa
Published in:
IEICE Trans. Electron. (2016)
Keyphrases
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phase difference
management system
real time
phase locked loop
analog to digital converter
flip flops
low power
high density
data sets
mixed signal
design considerations
master slave
text to speech
digital media
digital content
magnetic tape
power consumption
learning environment
neural network