Synthesis and formal verification of on-chip protocol transducers through decomposed specification.
Masahiro FujitaHideo TanidaFei GaoTasuku NishiharaTakeshi MatsumotoPublished in: ISQED (2010)
Keyphrases
- formal verification
- coloured petri nets
- model checker
- functional verification
- model checking
- cryptographic protocols
- bounded model checking
- automated verification
- symbolic model checking
- high speed
- formal specification
- transition systems
- low cost
- temporal logic
- program slicing
- finite automata
- finite state machines
- analog vlsi
- lightweight
- single chip
- circuit design
- low power