Single-chip FPGA architecture for 3D IIR broadband spatio-temporal beam plane-wave filters.
Arjuna MadanayakeLeonard T. BrutonPublished in: ISCAS (2006)
Keyphrases
- single chip
- software implementation
- spatio temporal
- low power
- cmos image sensor
- low cost
- high speed
- signal processor
- digital filters
- infinite impulse response
- embedded processors
- real time
- power consumption
- hardware implementation
- machine vision
- three dimensional
- low power consumption
- image sequences
- edge detection
- space time
- cmos technology
- finite impulse response
- image quality
- video sequences
- image sensor