Towards 5ps resolution TDC on a dynamically reconfigurable FPGA (abstract only).
Marc-André DaigneaultJean-Pierre DavidPublished in: FPGA (2010)
Keyphrases
- high resolution
- high speed
- real time image processing
- field programmable gate array
- databases
- real time
- fpga implementation
- hardware implementation
- signal processing
- low resolution
- data structure
- consequence finding
- low power consumption
- low cost
- database systems
- high level
- learning algorithm
- information retrieval
- data mining
- real world