Marc-André Daigneault

Publication Activity (10 Years)

Years Active: 2008-2018
Publications (10 Years): 2

Top Topics

Design Methodology

Matrix Multiplication

Intermediate Level Vision

Control Program

Top Venues

ACM Trans. Reconfigurable Technol. Syst.

Comput. Electr. Eng.

Publications

Marc-André Daigneault, Jean-Pierre David
Automated Synthesis of Streaming Transfer Level Hardware Designs. ACM Trans. Reconfigurable Technol. Syst. 11 (2) (2018)
Marc-André Daigneault, Jean-Pierre David
Intermediate-Level Synthesis of a Gauss-Jordan Elimination Linear Solver. IPDPS Workshops (2015)
Marc-André Daigneault, Jean-Pierre David
Fast description and synthesis of control-dominant circuits. Comput. Electr. Eng. 40 (4) (2014)
Marc-André Daigneault, Jean-Pierre David
Hardware description and synthesis of control-intensive reconfigurable dataflow architectures (abstract only). FPGA (2013)
Marc-André Daigneault, Jean-Pierre David
High-Level Description and Synthesis of Floating-Point Accumulators on FPGA. FCCM (2013)
Marc-André Daigneault, Jean-Pierre David
Synchronized-transfer-level design methodology applied to hardware matrix multiplication. ReConFig (2012)
Marc-André Daigneault, Jean-Pierre David
Raising the abstraction level of HDL for control-dominant applications. FPL (2012)
Marc-André Daigneault, Jean-Pierre David
A High-Resolution Time-to-Digital Converter on FPGA Using Dynamic Reconfiguration. IEEE Trans. Instrum. Meas. 60 (6) (2011)
Marc-André Daigneault, Jean-Pierre David
Towards 5ps resolution TDC on a dynamically reconfigurable FPGA (abstract only). FPGA (2010)
Marc-André Daigneault, J. M. Pierre Langlois, Jean-Pierre David
Application Specific Instruction set processor specialized for block motion estimation. ICCD (2008)