Transistor-mapped binary decision diagram for CMOS circuits.
Chia-Pin R. LiuPublished in: CAINE (2006)
Keyphrases
- binary decision diagrams
- high speed
- power dissipation
- floating gate
- circuit design
- low power
- power consumption
- cmos technology
- delay insensitive
- analog vlsi
- boolean functions
- pseudo boolean constraints
- focal plane
- planning problems
- chip design
- vlsi circuits
- decision diagrams
- model checking
- digital signal processing
- knowledge compilation
- boolean formula
- finite state machines
- data structure
- digital circuits
- low voltage
- constraint satisfaction problems
- low cost
- metal oxide semiconductor