On-chip interconnect boosting technique by using of 10-nm double gate-all-around (DGAA) transistor.
Jaemin LeeMyunghwan RyuYoungmin KimPublished in: IEICE Electron. Express (2015)
Keyphrases
- power dissipation
- cmos technology
- nm technology
- power consumption
- low power
- high speed
- chip design
- low voltage
- digital signal processing
- design methodology
- ensemble learning
- learning algorithm
- finite state machines
- boosting algorithms
- feature selection
- silicon on insulator
- weak classifiers
- ensemble methods
- low cost
- power management
- multi class
- leakage current
- machine learning