A Scheduler ASIC for a Programmable Packet Switch.
L. Louis ZhangBrent BeachamMassoud R. HashemiPaul ChowAlberto Leon-GarciaPublished in: IEEE Micro (2000)
Keyphrases
- single chip
- packet switching
- switched networks
- packet scheduling
- low power
- high speed
- integrated circuit
- application specific
- low cost
- general purpose
- packet loss
- design methodology
- quality of service
- scheduling algorithm
- real time
- resource utilization
- network design
- hardware implementation
- packet transmission
- hardware architecture
- wireless channels
- wireless networks
- physical design
- packet size
- digital signal processors
- functional verification
- destination node
- scheduling policies
- application layer
- resource management
- response time
- neural network