Ultra-low voltage adders in 28 nm FDSOI exploring poly-biasing for device sizing.

Ali Asghar Vatanjou Even Låte Trond Ytterdal Snorre Aunet

Published in: NORCAS (2016)

Keyphrases

low voltage
cmos technology
low power
silicon on insulator
high speed
leakage current
power line
power dissipation
parallel processing
power consumption
design considerations
random access memory
metal oxide semiconductor
image sensor
low cost
power management
image restoration