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Memory Efficient Modular VLSI Architecture for Highthroughput and Low-Latency Implementation of Multilevel Lifting 2-D DWT.
Basant K. Mohanty
Pramod Kumar Meher
Published in:
IEEE Trans. Signal Process. (2011)
Keyphrases
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memory efficient
vlsi architecture
low latency
vlsi implementation
real time
low power
low complexity
high throughput
high speed
wavelet transform
data structure
virtual machine
highly efficient
low cost