A Simplified Layout-Level method for Single Event Transient Faults Susceptibility on Logic Gates.
Rafael B. SchvittzDenis Teixeira FrancoLeomar SoaresPaulo Francisco ButzenPublished in: VLSI-SoC (2019)
Keyphrases
- computational cost
- pairwise
- fully automatic
- segmentation method
- detection method
- high accuracy
- significant improvement
- cost function
- artificial neural networks
- fault diagnosis
- neural network
- dynamic programming
- classification accuracy
- support vector machine
- semi supervised
- computationally efficient
- detection algorithm
- high precision