Charge-Recovery Power Clock Generators for Adiabatic Logic Circuits.

Muhammad Arsalan Maitham Shams

Published in: VLSI Design (2005)

Keyphrases

logic circuits
power consumption
low power
power dissipation
functional decomposition
tunnel diode
gate array
high speed
digital signal processing
logic synthesis
duty cycle
clock frequency
pattern recognition
real time
low cost
differential equations