Login / Signup
A Hybrid Approach to the Test of Cache Memory Controllers Embedded in SoCs.
Wilson J. Perez
Jaime Velasco-Medina
Danilo Ravotto
Edgar E. Sánchez
Matteo Sonza Reorda
Published in:
IOLTS (2008)
Keyphrases
</>
neural network
main memory
embedded processors
dynamic random access memory
memory hierarchy
cache conscious
virtual memory
prefetching
garbage collection
control system
memory access
embedded systems
memory requirements
test cases
buffer management
hash table
cache management
memory subsystem