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A 3.2GS/s 4.55b ENOB two-step subranging ADC in 45nm SOI CMOS.

Jean-Olivier PlouchartMihai A. T. SanduleanuZeynep Toprak DenizTroy J. BeukemaScott K. ReynoldsBenjamin D. ParkerMichael P. BeakesJosé A. TiernoDaniel J. Friedman
Published in: CICC (2012)
Keyphrases
  • silicon on insulator
  • post processing
  • analog to digital converter
  • low cost
  • real time
  • analog vlsi
  • preprocessing
  • high speed
  • power consumption
  • power supply
  • cmos technology
  • vlsi circuits